Single crystal silicon, which is the starting material for most processes for the fabrication of semiconductor electronic components, is commonly prepared by the so-called Czochralski (“Cz”) method. In this method, polycrystalline silicon (“polysilicon”) is charged to a crucible and melted, a seed crystal is brought into contact with the molten silicon, and then a single crystal ingot is grown by slow extraction. After formation of a neck is complete, the diameter of the crystal is enlarged by decreasing the pulling rate and/or the melt temperature until the desired or target diameter is reached. The cylindrical main body of the crystal, which has an approximately constant diameter, is then grown by controlling the pull rate and the melt temperature while compensating for the decreasing melt level. Near the end of the growth process, but before the crucible is emptied of molten silicon, the crystal diameter must be reduced gradually to form an end-cone. Typically, the end-cone is formed by increasing the crystal pull rate and heat supplied to the crucible. When the diameter becomes small enough, the crystal is then separated from the melt.
Czochralski-grown ingots are then cut to eliminate the generally cone-shaped ends, their central cylindrical portion may be segmented into a plurality of segments, and each segment sliced into a plurality of wafers. Each wafer is finished, e.g., by grinding and polishing, so that its two opposite faces are flat, and then may be etched, e.g., by chemical etching steps, so that dust, residual particles, and zones damaged during the preceding material-removal steps are eliminated.
In recent years, it has been recognized that Czochralski-grown silicon can host a number of different defects associated with this growth process. Among these defects are vacancy agglomerations of various sizes, interstitial agglomerations of various sizes, and oxygen precipitates with a size that depends on the specific crystal process used. While the densities of these defects are typically relatively low, these defects can severely impact the yield potential of the material in the production of complex and highly integrated circuits. As a result, accurate and efficient detection of such defects is critical for purposes of both quality assurance and process control.
Vacancy-type defects are recognized to be the origin of such observable crystal defects, for example, D-defects. Vacancy-type defects are often referred to according to one or more of the test methods generally used to identify such defects including but not limited to Flow Pattern Defects (FPDs), Gate Oxide Integrity (GOI) Defects, Crystal Originated Particle (COP) Defects, crystal originated Light Point Defects (LPDs), Direct Surface Oxidation Defects (also referred to as DSOD) as well as certain classes of bulk defects observed by infrared light scattering techniques such as Scanning Infrared Microscopy and Laser Scanning Tomography defects (LSTDs). Also present in regions of excess vacancies are defects which act as the nuclei for ring oxidation induced stacking faults (OISF). It is speculated that this particular defect is a high temperature nucleated oxygen agglomerate catalyzed by the presence of excess vacancies.
Defects relating to self-interstitials are less well studied. They are generally regarded as being low densities of interstitial-type dislocation loops or networks. Such defects are not responsible for gate oxide integrity failures, an important wafer performance criterion, but they are widely recognized to be the cause of other types of device failures usually associated with current leakage problems. Since many defects are relatively small and can be of very low density, it can be a laborious process to determine if any of the possible crystal related defects are present at a given place in a crystal or on a given wafer. More specifically, although large vacancy agglomerations can be detected via surface inspection of a polished wafer, very small vacancy agglomerations, oxygen precipitates and interstitial agglomerates are not detected easily in polished wafer form. In such cases, laborious tests, such as the FPD, DSOD, LSTD and/or thermal cycles in combination with cleaving and etching the exposed surface are required to delineate and count defect densities. In addition, most of these methods further require manual inspections and counting procedures to quantify the densities.